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authorRoot THC2026-02-24 12:42:47 +0000
committerRoot THC2026-02-24 12:42:47 +0000
commitc9cbeced5b3f2bdd7407e29c0811e65954132540 (patch)
treeaefc355416b561111819de159ccbd86c3004cf88 /other/burneye2/codegen.h
parent073fe4bf9fca6bf40cef2886d75df832ef4b6fca (diff)
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1/* codegen.h - generic code generation functions, include file
2 *
3 * by scut
4 */
5
6#ifndef CODEGEN_H
7#define CODEGEN_H
8
9#include <ia32/ia32-decode.h>
10#include <ia32/ia32_opcodes.h>
11
12
13typedef struct {
14 /* overall number of instructions in the basic block
15 */
16 unsigned int in_count;
17
18 /* .a ins1 .b ins2 .c ins3 .d ins4 ...
19 *
20 * ins[123..] are the original basic block instructions. ".a", ".b",
21 * ".c", ... are points right before the instructions. in_points[.a]
22 * (.a is zero, .b one, ..) is a list of instructions to be inserted
23 * at point .a. at this point in_points_icount[.a] instructions will
24 * be inserted.
25 */
26 ia32_instruction ** in_points;
27 unsigned int ** in_points_opcode;
28 unsigned int * in_points_icount;
29} instr_array;
30
31
32typedef struct {
33 /* number of dataflow analysed machine instructions analysed for this
34 * profile.
35 */
36 unsigned int lines;
37
38 /* sum of all probabilities. always greater-equal 1.0
39 */
40 double sum;
41
42 /* percentages (values between 0.0 and 1.0) for each register. indexed
43 * using IA32_REG_*.
44 */
45 double reg_use[IA32_REG_COUNT];
46} reguse_profile;
47
48
49typedef struct {
50 /* number of instructions considered
51 */
52 unsigned int lines;
53
54 /* opnum-indexed array of percentages (values between 0.0 and 1.0) for
55 * every mnemonic
56 */
57 double inst_use[IA32_OPNUM_COUNT];
58} instuse_profile;
59
60
61/* codegen_operands_prob_build
62 *
63 * generate the probability table codegen_operands_prob from codegen_operands
64 * and the instruction usage profile `iprof'. this is necessary to reuse the
65 * random functions in utility.c.
66 *
67 * return in any case
68 */
69
70void
71codegen_operands_prob_build (instuse_profile *iprof);
72
73
74/* codegen_generate_instruction
75 *
76 * generate an ia32_instruction structure for `opcode' that does not clobber
77 * any memory, but only registers and eflags not used in `used_mask' (which is
78 * defined as ia32-dataflow does it). write the instruction structure to
79 * `place'. if `source_clobbered' is non-zero, the source operand will be
80 * overwritten by the instruction. if `prof' is non-NULL, registers are picked
81 * according to the profile.
82 *
83 * return NULL on failure
84 * return place on success
85 */
86
87ia32_instruction *
88codegen_generate_instruction (unsigned int opcode, unsigned int used_mask,
89 ia32_instruction *place, int source_clobbered, reguse_profile *prof);
90
91
92/* codegen_getreg
93 *
94 * generate a register number. if `clobber' is true, a register will be
95 * generated that does not touch any of the ones in `used_mask'. if `clobber'
96 * is false, a register from `used_mask' is generated. if `prof' is non-NULL,
97 * the register will be choosen by its probability. if `reg_avoid' is
98 * non-negative, the picking tries to avoid the register with number
99 * `reg_avoid'.
100 *
101 * return -1 on failure
102 * return register index on success (0-7)
103 */
104
105int
106codegen_getreg (unsigned int used_mask, int clobber, reguse_profile *prof,
107 int reg_avoid);
108
109
110/* codegen_generate_operation
111 *
112 * generate a IA32 opcode number (from ia32_opcodes.h) to be used for a new
113 * instruction. the generated opcode will not clobber any eflags used in
114 * `used_mask', which is defined as in ia32-dataflow. `source_clobbered' is
115 * overwritten with either zero or non-zero, depending on whether the source
116 * operand of the generated opcode is overwritten by the instruction. if
117 * `iprof' is non-NULL, the instructions will be picked according to the
118 * statistical distribution of `iprof'.
119 *
120 * return opcode number in any case
121 */
122
123unsigned int
124codegen_generate_operation (unsigned int used_mask, int *source_clobbered,
125 instuse_profile *iprof);
126
127
128/* codegen_reguse_profile_create
129 *
130 * create a register use profile from the function list `flist'
131 * and `flist_count', which all need to have passed a dataflow analysis.
132 *
133 * return NULL on failure
134 * return register usage profile on success
135 */
136
137reguse_profile *
138codegen_reguse_profile_create (ia32_function **flist, unsigned int flist_count);
139
140
141/* codegen_reguse_profile_print
142 *
143 * print the profile `prof' to stdout.
144 *
145 * return in any case
146 */
147
148void
149codegen_reguse_profile_print (reguse_profile *prof);
150
151
152/* codegen_instuse_profile_print
153 *
154 * print an instruction usage profile `iprof'. if `machine' is non-zero, a
155 * machine parsable format will be used.
156 *
157 * return in any case
158 */
159
160void
161codegen_instuse_profile_print (instuse_profile *iprof, int machine);
162
163
164/* codegen_instuse_profile_create
165 *
166 * create an instruction usage profile for all functions in `flist', which is
167 * `flist_count' items long.
168 *
169 * return the profile in any case
170 */
171
172instuse_profile *
173codegen_instuse_profile_create (ia32_function **flist, unsigned int flist_count);
174
175
176/* codegen_instr_array_copy
177 *
178 * create a deep copy of the instruction array `ia'.
179 *
180 * return new array on success
181 * return NULL if there was nothing to copy
182 */
183
184instr_array *
185codegen_instr_array_copy (instr_array *ia);
186
187
188/* codegen_instr_array_split
189 *
190 * split the instruction array `ia' at the `split_point'th instruction into a
191 * new array. shorten `ia' appropiatly. this is the pendant to
192 * ia32_df_bblock_split and they both act similar to a copy constructor. they
193 * are required for basic block splitting.
194 *
195 * return new instruction array (lieing directly behind `ia')
196 */
197
198instr_array *
199codegen_instr_array_split (instr_array *ia, unsigned int split_point);
200
201#endif
202
203